Having got a correct system spec, move on to the architectural level. This identifies major functional blocks and interconnections between them.
In the STUMP, we can identify four functional blocks on the datapath, and one control block. The diagram assumes that PC is in the register bank and has a dedicated output port, and that the instruction register is in the data interface.
The register bank provides a general purpose register store, and contains the PC. It gets input data from the memory and execute unit, and supplies operands to the execute unit, PC address and memory.
The execute unit performs arithmetic and logic on input data, and can also update the condition codes. The execute unit gets its input data from the register bank and instr reg, and its output goes to the register bank or memory.
The data interface unit handles all data to and from memory. It is the data out for store instructions, data in for load instructions, and is used to fetch instructions from memory.
The address interface handles all addresses to memory. It has inputs from the PC (for fetching instructions), and the execute unit for load/store instruction addresses.
Finally, the control unit interprets bits in the instruction and condition code bits and produces correct signals to control the flow of data and actions in the 4 functional data blocks at the correct time (fetch, execute and writeback).
Having drawn architecture diagram, we want to check that all the paths we need are present, and that interconnection only has one set of data on it at any time. We do this with path usage diagrams for each instruction type and phase. Note the sparse use of paths.
When the paths ate ok, write (external) behavioural models of each block. In a complex system, we would write and test each block seperately.
Once it has been verified, assemble the whole design and run system spec tests.
This is the level at which architectural alternatives can be explored.