VLSI

Contents:

• Requirements analysis
  • Design choices
  • Actual Requirements analysis
• System Specification
  • STUMP
• Architectural Design
• RTL
• Pipelining the STUMP
  • Pipeline Disruption
  • Verifying Paths
• Verilog
• Testability
  • Making a design testable
  • Partition
  • Signature Analysis
  • Scan Path
  • Boundary Scan
  • Built-In-Logic-Block Observer (BILBO)
• Timing
  • Asynchronous Design
  • Two-Phase Non-Overlapping Clock
  • Clock Buffering
  • Timing Delays
  • Clock Skew
  • Effect of Scaling on Timing
• Logic
  • Datapath Design
  • Control Design
• Exam